Job Description
T
The Walt Disney Company
Senior Storage Systems Engineer
The Walt Disney Company • Los Angeles, CA, United States • via Jobs For Stevenage Fans
20 hours ago
Full–time
Apply on Jobs For Stevenage Fans
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Apply on Aspire Media Group Jobs
Apply on Local Jobs - Hire The Better
Apply on Vacancies For Col U Fans
Apply on FOX8 Jobs
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Job highlights
Identified by Google from the original job post
Qualifications
Expertise in Storage Architecture: You enjoy creating resilient storage platforms and see challenges as opportunities for innovative solutions
Adaptability: You thrive in evolving environments where data volume increases and requirements change frequently
Technical Acumen: You rapidly understand intricate storage concepts and apply them effectively to production scenarios
20 more items(s)
Benefits
Actual base pay will depend on various factors including internal equity, geographic region, and job-related experience
In addition to salary, opportunities for bonuses may be available as part of the compensation package
Full benefits will also be provided based on the level and position
Responsibilities
Join us in a pivotal role where you will design and operate the high-performance storage platforms that drive Disney Studios' content production
Your expertise will help us support demanding media workflows critical to our operations—from inception through post-production and worldwide release
Architect, deploy, and maintain high-performance storage systems for production workflows
7 more items(s)
Job description
Job Posting Title: Senior Storage Systems Engineer
Req ID: 1014XXXXXX
Department Description:
At Disney, we believe in the power of storytelling to make the impossible, possible. We're a leader in both entertainment and technology, driven by the same passion that Walt Disney had for creativity and innovation. Our enterprise ranges widely, from theme parks and resorts to sports, news, and films, al...
Report this listing
K2 Space
ASIC Physical Design Engineer
K2 Space • Los Angeles, CA, United States • via ZipRecruiter
10 hours ago
$1.3L–$2L a year
Full–time
Apply directly on ZipRecruiter
Apply on Learn4Good
Job highlights
Identified by Google from the original job post
Qualifications
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
2+ years of experience in ASIC physical design for complex SoCs
Hands-on experience with industry-standard tools (Synopsys ICC2/Fusion Compiler, Cadence Innovus, or equivalent)
15 more items(s)
Benefits
Base salary range for this exempt role is $130,000 – $200,000 + equity in the company
Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
Comprehensive benefits package including paid time off, medical/dental/vision coverage, life insurance, paid parental leave, and many other perks
Responsibilities
We are seeking a ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems
In this role, you will contribute to the full physical design flow—from synthesis to GDSII—working closely with architecture, RTL, verification, and packaging teams
You'll be a key contributor in achieving timing closure, optimizing PPA, and supporting design integration with external partners
10 more items(s)
Job description
K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and others – with an additional $500M in signed contracts across commercial and US government customers – we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.
The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.
With multiple launches planned through 2026 and 2027, we're Building Bigger to develop the solar system and become a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a groundbreaking Series C space startup, we'd love for you to apply.
The Role
We are seeking a ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full physical design flow—from synthesis to GDSII—working closely with architecture, RTL, verification, and packaging teams. You'll be a key contributor in achieving timing closure, optimizing PPA, and supporting design integration with external partners. You will be part of a collaborative design team developing state-of-the-art mixed-signal SoCs to be hosted on some of the largest, most powerful, rapidly designed and rapidly manufactured satellites ever deployed in space. In your first 6 months, you will develop and implement new SoC sub-systems for satellite communications and beyond. In your first two years, you will have contributed to developing cutting-edge SoCs that will fly in space.
Responsibilities
• Execute the complete physical design flow for complex SoC blocks and/or top-level integration, including synthesis, floorplanning, place & route, CTS, STA, and physical verification.
• Perform timing closure and optimization across multiple corners and modes using industry-standard tools.
• Collaborate with DFT teams to ensure clean timing convergence.
• Develop and maintain scripts and automation to improve flow efficiency and consistency.
• Support physical sign-off activities including DRC/LVS, STA, EM, Signal Integrity and power analysis.
• Assist in chip-level integration, timing and functional ECOs, and tapeout preparation.
• Contribute to methodology development, tool evaluation, and flow documentation.
Qualifications
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 2+ years of experience in ASIC physical design for complex SoCs.
• Hands-on experience with industry-standard tools (Synopsys ICC2/Fusion Compiler, Cadence Innovus, or equivalent).
• Strong understanding of timing analysis, power optimization, and physical verification flows.
• Experience with hierarchical or flat SoC design methodologies.
• Familiarity with FinFET technologies.
• Working knowledge of DFT, UPF/CPF power intent, and ECO implementation.
• Strong problem-solving skills and ability to work cross-functionally in fast-paced environments.
Nice to Have
• Exposure to radiation-hardened or space-qualified ASICs.
• Experience with chip-package co-design or advanced packaging (2.5D/3D).
• Familiarity with physical design service vendor management or offshore collaboration.
• Experience with sign-off through TSMC.
• Experience with Gate-All-Around technologies.
• Experience working in cross-functional, geographically distributed teams.
Compensation and Benefits:
• Base salary range for this exempt role is $130,000 – $200,000 + equity in the company
• Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
• Comprehensive benefits package including paid time off, medical/dental/vision coverage, life insurance, paid parental leave, and many other perks
If you don't meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!
If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.
Export Compliance
As defined in the ITAR, "U.S. Persons" include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a "U.S. Person."
The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a "U.S. person" as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.
Equal Opportunity
K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, ****** orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
The Walt Disney Company
Senior Storage Systems Engineer
The Walt Disney Company • Los Angeles, CA, United States • via Jobs For Stevenage Fans
20 hours ago
Full–time
Apply on Jobs For Stevenage Fans
Apply on SaluteMyJob
Apply on Edinburgh City FC
Apply on Aspire Media Group Jobs
Apply on Local Jobs - Hire The Better
Apply on Vacancies For Col U Fans
Apply on FOX8 Jobs
Apply on Move Collective Jobs
Job highlights
Identified by Google from the original job post
Qualifications
Expertise in Storage Architecture: You enjoy creating resilient storage platforms and see challenges as opportunities for innovative solutions
Adaptability: You thrive in evolving environments where data volume increases and requirements change frequently
Technical Acumen: You rapidly understand intricate storage concepts and apply them effectively to production scenarios
20 more items(s)
Benefits
Actual base pay will depend on various factors including internal equity, geographic region, and job-related experience
In addition to salary, opportunities for bonuses may be available as part of the compensation package
Full benefits will also be provided based on the level and position
Responsibilities
Join us in a pivotal role where you will design and operate the high-performance storage platforms that drive Disney Studios' content production
Your expertise will help us support demanding media workflows critical to our operations—from inception through post-production and worldwide release
Architect, deploy, and maintain high-performance storage systems for production workflows
7 more items(s)
Job description
Job Posting Title: Senior Storage Systems Engineer
Req ID: 1014XXXXXX
Department Description:
At Disney, we believe in the power of storytelling to make the impossible, possible. We're a leader in both entertainment and technology, driven by the same passion that Walt Disney had for creativity and innovation. Our enterprise ranges widely, from theme parks and resorts to sports, news, and films, al...
Report this listing
K2 Space
ASIC Physical Design Engineer
K2 Space • Los Angeles, CA, United States • via ZipRecruiter
10 hours ago
$1.3L–$2L a year
Full–time
Apply directly on ZipRecruiter
Apply on Learn4Good
Job highlights
Identified by Google from the original job post
Qualifications
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
2+ years of experience in ASIC physical design for complex SoCs
Hands-on experience with industry-standard tools (Synopsys ICC2/Fusion Compiler, Cadence Innovus, or equivalent)
15 more items(s)
Benefits
Base salary range for this exempt role is $130,000 – $200,000 + equity in the company
Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
Comprehensive benefits package including paid time off, medical/dental/vision coverage, life insurance, paid parental leave, and many other perks
Responsibilities
We are seeking a ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems
In this role, you will contribute to the full physical design flow—from synthesis to GDSII—working closely with architecture, RTL, verification, and packaging teams
You'll be a key contributor in achieving timing closure, optimizing PPA, and supporting design integration with external partners
10 more items(s)
Job description
K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and others – with an additional $500M in signed contracts across commercial and US government customers – we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.
The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.
With multiple launches planned through 2026 and 2027, we're Building Bigger to develop the solar system and become a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a groundbreaking Series C space startup, we'd love for you to apply.
The Role
We are seeking a ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full physical design flow—from synthesis to GDSII—working closely with architecture, RTL, verification, and packaging teams. You'll be a key contributor in achieving timing closure, optimizing PPA, and supporting design integration with external partners. You will be part of a collaborative design team developing state-of-the-art mixed-signal SoCs to be hosted on some of the largest, most powerful, rapidly designed and rapidly manufactured satellites ever deployed in space. In your first 6 months, you will develop and implement new SoC sub-systems for satellite communications and beyond. In your first two years, you will have contributed to developing cutting-edge SoCs that will fly in space.
Responsibilities
• Execute the complete physical design flow for complex SoC blocks and/or top-level integration, including synthesis, floorplanning, place & route, CTS, STA, and physical verification.
• Perform timing closure and optimization across multiple corners and modes using industry-standard tools.
• Collaborate with DFT teams to ensure clean timing convergence.
• Develop and maintain scripts and automation to improve flow efficiency and consistency.
• Support physical sign-off activities including DRC/LVS, STA, EM, Signal Integrity and power analysis.
• Assist in chip-level integration, timing and functional ECOs, and tapeout preparation.
• Contribute to methodology development, tool evaluation, and flow documentation.
Qualifications
• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 2+ years of experience in ASIC physical design for complex SoCs.
• Hands-on experience with industry-standard tools (Synopsys ICC2/Fusion Compiler, Cadence Innovus, or equivalent).
• Strong understanding of timing analysis, power optimization, and physical verification flows.
• Experience with hierarchical or flat SoC design methodologies.
• Familiarity with FinFET technologies.
• Working knowledge of DFT, UPF/CPF power intent, and ECO implementation.
• Strong problem-solving skills and ability to work cross-functionally in fast-paced environments.
Nice to Have
• Exposure to radiation-hardened or space-qualified ASICs.
• Experience with chip-package co-design or advanced packaging (2.5D/3D).
• Familiarity with physical design service vendor management or offshore collaboration.
• Experience with sign-off through TSMC.
• Experience with Gate-All-Around technologies.
• Experience working in cross-functional, geographically distributed teams.
Compensation and Benefits:
• Base salary range for this exempt role is $130,000 – $200,000 + equity in the company
• Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
• Comprehensive benefits package including paid time off, medical/dental/vision coverage, life insurance, paid parental leave, and many other perks
If you don't meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!
If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.
Export Compliance
As defined in the ITAR, "U.S. Persons" include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a "U.S. Person."
The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a "U.S. person" as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.
Equal Opportunity
K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, ****** orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
💡 Quick Summary
Seeking a career-building opportunity? The ASIC Physical Design Engineer position is now open for candidates interested in the IT Engineer & Developer Jobs sector. This role in Los Angeles offers a professional environment and growth potential.
Requirement Snapshot: Candidates should possess basic communication skills, a proactive attitude, and the ability to work in a team. Experience in IT Engineer & Developer Jobs is a plus.
