FTE Emulation VLSI Lead

Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting company focused on building innovative solutions that address clients’ most complex digital transformation needs. Leveraging our holistic portfolio of capabilities in consulting, design, engineering, and operations, we help clients realize their boldest ambitions and build future-ready, sustainable businesses. With over 230,000 employees and business partners across 65 countries, we deliver on the promise of helping our customers, colleagues, and communities thrive in an ever-changing world. For additional information, visit us at www.wipro.com.Long Description

1. ASIC RTL Engineer

Job Description:

RTL, Coding, Design, IP Design, SOC Development, Lint, CDC , Micro Architecture - Mandatory

PCIe/DDR/Ethernet - Any One

I2C,UART/SPI - Any One

Spyglass Lint/CDC / Synopsys DC / Verdi/Xcellium - Any One

scripting languages like Make flow, Perl ,shell, python - Any One

Location: Bangalore / Hyderabad / Kochi

Experience - 7+ - Lead/Architect

2. Emulation Lead

JD - Emulation Lead (Zebu/ HAPS /Veloce/Palladium and Module Build (End to End)

Location - Bangalore / Hyderabad

Experience - 7+ - Lead/Architect

3. Lead Design Verification Engineer

Job Description:

7+ years of hands-on DV experience in SystemVerilog/UVM.

Must be able to own and drive the verification of a block / subsystem or a SOC.

Should have a track record of leading a team of engineers.

Extensive experience in IP/sub-system and/or SoC level verification based on SV/UVM.

Experience in Tesplan and Testbench development,

Execution of test plan using high quality constrained random UVM tests to hit coverage goals on time.

Should be good with debugging and exposed to all aspects of verification flow including Gatesims

Must have extensive experience in verification of one or more of the following:

PCI Express or UCIe, CXL or NVMe

AXI, ACE or CHI

Ethernet, RoCE or RDMA

DDR or LPDDR or HBM

ARM or RISC-V CPU based subsystem or SOC level verification using C/Assembly languages

Power Aware Simulations using UPF

Experience in using one or more of EDA tools such as VCS, Verdi, Cadence Xcelium, Simvision, Jasper.

Experience in using one or more of revision control systems such as: Git, Perforce, Clearcase.

Experience in SVA and formal verification is desirable (not a must)

Script development using Python, Perl or TCL is desirable (not a must)

Location - Bangalore, Hyderabad, Kochi, Pune, Ahmedabad, Pune

Experience - 7+ YoE

Long Description

4. Analog Circuit Design

Job Description:

Circuit Design implementation of IPs including LDOs, Band Gap reference, Current Generators, POR, ADC/DACs, PLLs, Oscillators, General Purpose IOs, Temperature sensor, SERDES, PHYs, Die to Die interconnect, High-speed IOs, etc.

Experience - 7+ Yrs + Lead/Architect

Location - Bangalore

5. DFT

Job Description - ATPG, MBIST

Location - Bangalore, Kochi, Pune, Hyderabad

Experience - 7 years + DFT Lead

Mandatory Skills: VLSI HVL Verification
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Experience: 5-8 Years
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Reinvent your world. We are building a modern Wipro. We are an end-to-end digital transformation partner with the boldest ambitions. To realize them, we need people inspired by reinvention. Of yourself, your career, and your skills. We want to see the constant evolution of our business and our industry. It has always been in our DNA - as the world around us changes, so do we. Join a business powered by purpose and a place that empowers you to design your own reinvention. Come to Wipro. Realize your ambitions. Applications from people with disabilities are explicitly welcome.

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