Job Description
Physical Design Engineer Block-Level (PnR)
Job Locations : Bangalore/Hyderabad/Noida/Ahmedabad
Job Summary
We are looking for a highly motivated Physical Design Engineer with a solid background in block-level place and route (PnR) to join our silicon implementation team.
The ideal candidate will have at least 6 years of experience in block-level physical design with proven expertise in timing closure, DRC/LVS, and performance optimization.
This role will involve working on advanced technology nodes and collaborating closely with RTL, DFT, STA, and power teams to ensure successful design with AMD flows is a significant plus.
Required Qualifications
• 6+ years of hands-on experience in block-level physical design using tools such as Synopsys ICC2, Cadence Innovus, or equivalent.
• Strong understanding of PnR flows, including floorplanning, placement, CTS, routing, and optimization.
• Proficient in timing concepts, static timing analysis (STA), and logic equivalence checks (LEC).
• Experience in DRC/LVS closure and handling design signoff at advanced technology nodes.
• Proven ability to manage power, performance, and area (PPA) optimizations at the block level.
• Solid understanding and experience with ECO flows, including physical and functional ECO implementation.
• Excellent problem-solving skills and ability to collaborate effectively with cross-functional teams.
• AMD flow experience is a strong plus.
Preferred Qualifications
• Exposure to low-power design methodologies, including multi-voltage domains and power gating.
• Experience working on advanced nodes (e.g., 7nm, 5nm, or below).
• Knowledge of clock domain crossing (CDC) issues and mitigation techniques.
• Familiarity with scripting languages (TCL, Perl, Python) to automate physical design tasks and flows.
• Experience with design partitioning, hierarchical implementation, and block integration at the top level.
• Familiarity with EM/IR analysis and thermal-aware design considerations.
(ref:https://www.linkedin.com/redir/suspicious-page?url=hirist%2etech)
Job Locations : Bangalore/Hyderabad/Noida/Ahmedabad
Job Summary
We are looking for a highly motivated Physical Design Engineer with a solid background in block-level place and route (PnR) to join our silicon implementation team.
The ideal candidate will have at least 6 years of experience in block-level physical design with proven expertise in timing closure, DRC/LVS, and performance optimization.
This role will involve working on advanced technology nodes and collaborating closely with RTL, DFT, STA, and power teams to ensure successful design with AMD flows is a significant plus.
Required Qualifications
• 6+ years of hands-on experience in block-level physical design using tools such as Synopsys ICC2, Cadence Innovus, or equivalent.
• Strong understanding of PnR flows, including floorplanning, placement, CTS, routing, and optimization.
• Proficient in timing concepts, static timing analysis (STA), and logic equivalence checks (LEC).
• Experience in DRC/LVS closure and handling design signoff at advanced technology nodes.
• Proven ability to manage power, performance, and area (PPA) optimizations at the block level.
• Solid understanding and experience with ECO flows, including physical and functional ECO implementation.
• Excellent problem-solving skills and ability to collaborate effectively with cross-functional teams.
• AMD flow experience is a strong plus.
Preferred Qualifications
• Exposure to low-power design methodologies, including multi-voltage domains and power gating.
• Experience working on advanced nodes (e.g., 7nm, 5nm, or below).
• Knowledge of clock domain crossing (CDC) issues and mitigation techniques.
• Familiarity with scripting languages (TCL, Perl, Python) to automate physical design tasks and flows.
• Experience with design partitioning, hierarchical implementation, and block integration at the top level.
• Familiarity with EM/IR analysis and thermal-aware design considerations.
(ref:https://www.linkedin.com/redir/suspicious-page?url=hirist%2etech)
💡 Quick Summary
Seeking a career-building opportunity? The Physical Design Engineer - PnR position is now open for candidates interested in the IT Engineer & Developer Jobs sector. This role in Noida offers a professional environment and growth potential.
Requirement Snapshot: Candidates should possess basic communication skills, a proactive attitude, and the ability to work in a team. Experience in IT Engineer & Developer Jobs is a plus.