Job Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Development of Verification IP using C/C++ (8+ Years) (Bangalore)
Greetings
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world.
Looking for passionate Verification IP developer using C/C++ candidate. If, interested kindly send your CV along with Current CTC & Notice period.
Brief of JD is as mentioned below.
Work location: Bangalore
Experience : 8+ Years
Software Engineer:
Requirements:
• B.Tech with relevant 8+ years of experience or M.Tech. degree in Computer Science or a related technical field
• Extensive experience in modeling in C/C++ and background in object-oriented, algorithms, and data structures.
• In-depth understanding of complexity, advanced debugging techniques for proficiency in troubleshooting software issues and debugging a large codebase.
• Strong analytical and problem-solving skills with an ability to visualize processes and outcomes.
• Outstanding all-round communication skills and ability to work collaboratively in a dynamic multi-location environment.
• Can manage multiple products at a time; can lead the team effectively and has the ability to mentor the members
OR
VLSI Engineer:
Requirements:
• B.E./B.Tech./M.E./M.Tech. degree with relevant 8+ years of experience.
• Good working knowledge of various verification concepts such as Verification architecture, coverage, checkers, test plan etc.
• Strong in building Verification environments based on UVM, System Verilog
• Strong analytical and problem-solving skills with an ability to visualize processes and outcomes.
• Outstanding all-round communication skills and ability to work collaboratively in a dynamic multi-location environment.
• Can manage multiple VIPs at a time; can lead the team effectively and has the ability to mentor the members
• Knowledge of programming skills : C/C++
Strong Plus for VLSI/software engineer:
• Knowledge of Verilog/System Verilog languages and UVM verification methodologies.
• Experience with digital logic design or IP/SoC level Verification flow.
• Customer orientation and knowledge of the EDA tool flow.
Regards
K Madhu Prasad (Madhu Reddy)
Hiring Team
m
We're doing work that matters. Help us solve what others can't
Development of Verification IP using C/C++ (8+ Years) (Bangalore)
Greetings
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world.
Looking for passionate Verification IP developer using C/C++ candidate. If, interested kindly send your CV along with Current CTC & Notice period.
Brief of JD is as mentioned below.
Work location: Bangalore
Experience : 8+ Years
Software Engineer:
Requirements:
• B.Tech with relevant 8+ years of experience or M.Tech. degree in Computer Science or a related technical field
• Extensive experience in modeling in C/C++ and background in object-oriented, algorithms, and data structures.
• In-depth understanding of complexity, advanced debugging techniques for proficiency in troubleshooting software issues and debugging a large codebase.
• Strong analytical and problem-solving skills with an ability to visualize processes and outcomes.
• Outstanding all-round communication skills and ability to work collaboratively in a dynamic multi-location environment.
• Can manage multiple products at a time; can lead the team effectively and has the ability to mentor the members
OR
VLSI Engineer:
Requirements:
• B.E./B.Tech./M.E./M.Tech. degree with relevant 8+ years of experience.
• Good working knowledge of various verification concepts such as Verification architecture, coverage, checkers, test plan etc.
• Strong in building Verification environments based on UVM, System Verilog
• Strong analytical and problem-solving skills with an ability to visualize processes and outcomes.
• Outstanding all-round communication skills and ability to work collaboratively in a dynamic multi-location environment.
• Can manage multiple VIPs at a time; can lead the team effectively and has the ability to mentor the members
• Knowledge of programming skills : C/C++
Strong Plus for VLSI/software engineer:
• Knowledge of Verilog/System Verilog languages and UVM verification methodologies.
• Experience with digital logic design or IP/SoC level Verification flow.
• Customer orientation and knowledge of the EDA tool flow.
Regards
K Madhu Prasad (Madhu Reddy)
Hiring Team
m
We're doing work that matters. Help us solve what others can't
💡 Quick Summary
Seeking a career-building opportunity? The Principal Software Engineer position is now open for candidates interested in the Software Developer Jobs sector. This role in Bengaluru offers a professional environment and growth potential.
Requirement Snapshot: Candidates should possess basic communication skills, a proactive attitude, and the ability to work in a team. Experience in Software Developer Jobs is a plus.
