Job Description
Job description
At ScaleFlux, we are a family unit powered by diversity, inclusion, transparency, respect, integrity, and passion—for both our clients and our people. Our business growth depends on your professional development, as we collaborate, share ideas and innovations, and invest in our future. By forging meaningful partnerships with our people, we come together with a shared purpose, exceeding our goals. This keeps us nimble, ahead of the competition, and at the forefront of our industry. Our continued success begins with you.
ScaleFlux helps customers harness data growth as a competitive advantage by building products that reduce complexity and accelerate the creation of value from data. In our first phase of rethinking the data pipeline for the up-to-date data center, ScaleFlux built a better SSD by embedding computational storage technology into flash drives. Now, customers can gain an edge by deploying storage intelligence to optimize their data center infrastructure for workloads like databases, analytics, IoT, and 5G.
For a detailed information about us visit the company website:
Qualifications and Minimum Requirements
• Minimum BE/BS degree (Masters preferred) in Electrical/Electronic Engineering with 10+ years of practical experience
• Strong fundamentals in digital ASIC design and verification
• Expertise in ARM cores and related infrastructure (like Coresight, NIC/NOC, other bus interconnects etc.)
•Expertise in CPUSS C-based verification.
• Familiarity with AMBA bus protocols, system memory hierarchy, system debug infrastructure and multi-core SOC
• Strong experience with Verilog, System Verilog, UVM and/or other
• Formal Verification experience is a plus • Understanding of major SOC interfaces like PCIE, NVMe, CXL DRAM, Flash, I2C, SSP, UART is desirable
• Understanding of IP designs and verification requirements
• Strong test creation, debug capability and functional coverage understanding
• Understanding of Gate Level Simulations (GLS) with timing and related debug capability
• Excellent communication and leadership quality to technically mentor and lead a team of verification engineers
Roles And Responsibilities
• Define and develop verification methodology, environment and test plans driven by functional coverage
• Contribute to IP and SoC verification
• Work closely with design team for continuous improvement of design quality through verification
• Review the test plans, verification tests and coverage for other team members
• Mentor team members for technical growth in verification
• Establish process of verification and quality improvements
• Contribute on GLS, emulation, FPGA based and Post Si validation
At ScaleFlux, we are a family unit powered by diversity, inclusion, transparency, respect, integrity, and passion—for both our clients and our people. Our business growth depends on your professional development, as we collaborate, share ideas and innovations, and invest in our future. By forging meaningful partnerships with our people, we come together with a shared purpose, exceeding our goals. This keeps us nimble, ahead of the competition, and at the forefront of our industry. Our continued success begins with you.
ScaleFlux helps customers harness data growth as a competitive advantage by building products that reduce complexity and accelerate the creation of value from data. In our first phase of rethinking the data pipeline for the up-to-date data center, ScaleFlux built a better SSD by embedding computational storage technology into flash drives. Now, customers can gain an edge by deploying storage intelligence to optimize their data center infrastructure for workloads like databases, analytics, IoT, and 5G.
For a detailed information about us visit the company website:
Qualifications and Minimum Requirements
• Minimum BE/BS degree (Masters preferred) in Electrical/Electronic Engineering with 10+ years of practical experience
• Strong fundamentals in digital ASIC design and verification
• Expertise in ARM cores and related infrastructure (like Coresight, NIC/NOC, other bus interconnects etc.)
•Expertise in CPUSS C-based verification.
• Familiarity with AMBA bus protocols, system memory hierarchy, system debug infrastructure and multi-core SOC
• Strong experience with Verilog, System Verilog, UVM and/or other
• Formal Verification experience is a plus • Understanding of major SOC interfaces like PCIE, NVMe, CXL DRAM, Flash, I2C, SSP, UART is desirable
• Understanding of IP designs and verification requirements
• Strong test creation, debug capability and functional coverage understanding
• Understanding of Gate Level Simulations (GLS) with timing and related debug capability
• Excellent communication and leadership quality to technically mentor and lead a team of verification engineers
Roles And Responsibilities
• Define and develop verification methodology, environment and test plans driven by functional coverage
• Contribute to IP and SoC verification
• Work closely with design team for continuous improvement of design quality through verification
• Review the test plans, verification tests and coverage for other team members
• Mentor team members for technical growth in verification
• Establish process of verification and quality improvements
• Contribute on GLS, emulation, FPGA based and Post Si validation
💡 Quick Summary
Seeking a career-building opportunity? The Verification Lead Engineer (Bharatpur) position is now open for candidates interested in the Media & Communication sector. This role in Bharatpur offers a professional environment and growth potential.
Requirement Snapshot: Candidates should possess basic communication skills, a proactive attitude, and the ability to work in a team. Experience in Media & Communication is a plus.