Job Description
Best Nanotech is expanding its VLSI team in Bengaluru. We are looking for a Senior Physical Design Engineer with 7+ years of experience to take ownership of complex high-speed blocks from Netlist to GDSII in advanced technology nodes (5nm/3nm).
Your Impact:
• Ownership: Lead the complete PnR flow (Floorplan, Placement, CTS, Routing) for multi-million gate IP/SoC blocks.
• Closure: Drive timing, power, and physical signoff (DRC/LVS) to convergence.
• Optimization: Solve complex congestion, IR drop, and signal integrity issues in FinFET technologies.
• Mentorship: Guide junior engineers on flow methodologies and debug strategies.
Technical Requirements:
• Deep expertise in Cadence Innovus or Synopsys ICC2.
• Strong background in STA (PrimeTime/Tempus) and constraint validation.
• Hands-on experience with Low Power Design (UPF/CPF) and IR/EM analysis (Redhawk/Voltus).
• Proven track record of tape-outs in 7nm/5nm or below.
• Scripting proficiency (Tcl/Python/Perl) to automate flows.
With your expertise in digital design automation and ability to drive projects forward, you will be an integral part of our team's success.
💡 Quick Summary
Seeking a career-building opportunity? The Physical Design Expertise Wanted position is now open for candidates interested in the IT Engineer & Developer Jobs sector. This role in Bangalore offers a professional environment and growth potential.
Requirement Snapshot: Candidates should possess basic communication skills, a proactive attitude, and the ability to work in a team. Experience in IT Engineer & Developer Jobs is a plus.
