Job Description
BE/ BTech (Electronics/ Electrical/ Electronics and Communication) MS or MTech would be preferred
The Candidate Is Expected To Have Worked On
Scan insertion and DRC cleanup
Pattern generation for Stuck-At, delay test, iddq, path delay and fault grading.
Memory testing. Should also know the algorithms. Should also have knowledge about diagnostics.
JTAG or P1500 or other interface mechanism
Desirable competencies
The Candidate Is Expected To Have Exposure To
Compression tools is highly desirable
LBIST, mixed-signal testing, logic equivalence
Writing testbenches and should be capable of writing RTL code for DFT blocks as and when required.
Bridge fault detection is desirable
ATE experience is an added advantage
Email your resume to [email protected] and mention position/location in the subject.
💡 Quick Summary
Seeking a career-building opportunity? The Senior DFT Engineer position is now open for candidates interested in the IT Engineer & Developer Jobs sector. This role in New Delhi offers a professional environment and growth potential.
Requirement Snapshot: Candidates should possess basic communication skills, a proactive attitude, and the ability to work in a team. Experience in IT Engineer & Developer Jobs is a plus.
